1. Field of the Invention
The present invention relates generally to data handling systems and, more particularly, to a high speed router or ATM (asynchronous transfer mode) switch employing a crossbar type switch configured in a manner which can rapidly and efficiently process data packets while minimizing the number of I/Os per crossbar chip.
2. Description of the Background Art
There is increasing interest in providing communications between disparate computer systems and even between networks of differing characteristics. Further, with the availability of very high bandwidth trunk lines, e.g., using fiber optic cables, there is increasing interest in combining traffic from a great variety of sources for transmission through a single trunk line. For wide area networks, packet switching technology is widely used where information to be transmitted is broken into packets of data which are preceded by headers containing information useful in routing. The header may also identify the source and the destination. Whether truly packet switched or not, most digital communication systems employ message formats in which there is an identifying header of some sort.
As is well known, data network usage is expanding at a great rate both in terms of private networks and also public networks such as the Internet. While transmission link bandwidths keep improving, the technology of the systems which connect the links has lagged behind. In particular, routers are needed which can keep up with the higher transmission link bandwidths. A high speed router needs to achieve three goals. First, it needs to have enough internal bandwidth to move packets between its input and output interfaces at the desired rates. Second, it needs enough packet processing power at the interfaces to forward the packets and, third, the router needs to be able to redirect the packets between possible paths at the requisite rates.
A typical router system employs at least one crossbar switch comprising a matrix of transmission pathways terminating in I/O nodes. Each of these I/O nodes is adapted to receive packets from a corresponding input interface and transmit packets to a corresponding output interface. As the number of interfaces utilizing a router system grows, a proportional strain is placed on the crossbar switches, which have a practical limit on the number of I/O nodes incorporated thereby. As such, of interest to designers of crossbar switches is the ability to maximize the number of interfaces with which a given number of I/O nodes communicate without compromising crossbar switch performance.
Accordingly, what is needed in the art is a crossbar subsystem that maximizes the number of interfaces with which a constrained number of I/O nodes can communicate with no degradation of functional capability.